S7L1618U2M Datasheet | NETSOL

SSSS7777LLLL1111666613318668UUUU2222MMMM 551122KKxx3366&&11MMxx1188DDDDRRIII+I+CCIOIOBBLL22SSRRAAMMww//OODDTT 18Mb DDRII+ CIO BL2 w/ ODT SRAM Specification (2.5 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS pliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. For updates or additional information about Netsol products, please contact to netsol@netsol.co.kr Rev. 1.2 Apr. 2013 -1- S7L1636U2M S7L1618U2M 512Kx36 & 1Mx18 DDRII+ CIO BL2 SRAM w/ ODT Document Title 512Kx36 & 1Mx18 - Bit DDRII+ CIO Burst Length of 2 SRAM w/ ODT (2.5 Clock Read Latency) Revision History Rev. No. History Final spec release Add 400MHz speed binning Change Thermal Resistance JA value from 20.8C/W to 16.3C/W Draft Date Feb. 2013 Mar. 2013 Apr. 2013 Remark Final Final Final Rev. 1.2 Apr. 2013 -2- S7L1636U2M S7L1618U2M 512Kx36 & 1Mx18 DDRII+ CIO BL2 SRAM w/ ODT 512Kx36 &...