NETSOL S7M401835M
The S7M403635M and S7M401835M are 4,718,592-bit Synchronous Static SRAMs. The NTSRAM, or Non-Turnaround Static Random Access Memory utilizes all bandwidth in any combination of operating cycles. The S7M403635M and S7M401835M are implemented with high performance CMOS technology and is available in 100pin TQFP and Multiple power and ground pins minimize ground bounce.| Part No. | S7M401835M |
|---|---|
| Datasheet | S7M401835M Download |
| Manufacturer | NETSOL |
| Description | 128Kx36 & 256Kx18 NTSRAM Flow-Through |
| Buy | Stock & Price |
ABSOLUTE MAXIMUM RATINGS
value of VDD and VIN (VDD : -0.3 to 4.6V ==> -0.5 to 4.6V) (VIN : -0.3 to VDD+0.3V ==> -0.5 to VDD+0.3V) Draft Date Aug. 2011 Nov. 2011 Remark Preliminary Final Oct. 2012 Final Rev. 1.1 Oct. 2012 -2- S7M403635M S7M401835M 128Kx36 & 256Kx18 NTSRAM Flow-Through 128Kx36 & 256Kx18 Bit NTSRAM Flow-ThroughFEATURES
● Fully registered inputs and outputs for pipelined operation● VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply
● VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V)
● Byte Writable Function
● Enable clock and suspend operation
● Single Read/Write control pin
● Asynchronous output enable control
● Self-timed Write control
● Three Chip Enable for simple depth expansion with no data contention
● An interleaved burst or a linear burst mode
● Power Down mode
● Operating in commeical and industrial temperature range
● 100-TQFP-1420A (Lead free package)
GENERAL DESCRIPTION
Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock.
