NETSOL S7Q161862M
The S7Q163662M and S7Q161862M are 18,874,368-bits Quadruple Synchronous Pipelined Burst SRAMs. They are organized as 524,288 words by 36bits for S7Q163662M and 1,048,576 words by 18bits for S7Q161862M. The Quadruple operation is possible by supporting DDR read and write operations through separate data output and input ports with the same cycle.| Part No. | S7Q161862M |
|---|---|
| Datasheet | S7Q161862M Download |
| Manufacturer | NETSOL |
| Description | 512Kx36 & 1Mx18 Quadruple BL2 SRAM |
| Buy | Stock & Price |
FEATURES
●1.8V/2.5V +0.1V/-0.1V Power Supply.● I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O.
●Separate independent read and write data ports with concurrent read and write operation
● HSTL I/O
● Full data coherency, providing most current data.
● Synchronous pipeline read with self timed early write.
● Registered address, control and data input/output.
● DDR (Double Data Rate) Interface on read and write ports.
● Fixed 2-bit burst for both read and write operation.
● Clock-stop supports to reduce current.
●Two input clocks (K and K) for accurate DDR timing at clock rising edges only.
●Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches.
●Single address bus.
●Byte write (x18, x36) function.
● Separate read/write control pin (R and W)
● Simple depth expansion with no data contention.
●Programmable output impedance.
● JTAG 1149.1 compatible test access port.
● 165FBGA(11x15 ball array FBGA) with body size of 13x15mm & Lead Free
KEY PARAMETERS
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