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S7S3218T4M - 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM

This page provides the datasheet information for the S7S3218T4M, a member of the S7S3236T4M 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM family.

Datasheet Summary

Description

The S7S3236T4M, S7S3218T4M and S7S3209T4M are 37,748,736-bits Quadruple Synchronous Pipelined Burst SRAMs.

They are organized as 1,048,576 words by 36bits for S7S3236T4M, 2,097,152 words by 18bits for S7S3218T4M and 4,194,304 words by 9bits for S7S3209T4M.

Features

  • Key Parameters.
  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future fre- quency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ Part Number Org. Freq. (MHz) Cycle Access Time Time RoHS (ns) (ns) -0.1V for 1.8V I/O.
  • Separate independent read and write data ports with concurrent read and write operation S7S3236T4M-E(F)C(I)45 x36 450 2.2 0.45  S7S3236T4M-E(F)C(I)40 400 2.5 0.45 .

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Datasheet preview – S7S3218T4M

Datasheet Details

Part number S7S3218T4M
Manufacturer NETSOL
File Size 432.66 KB
Description 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM
Datasheet download datasheet S7S3218T4M Datasheet
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Full PDF Text Transcription

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S7S3236T4M S7S3218T4M S7S3209T4M 11MMxx3366 && 22MMxx1188 && 44MMxx99 QQuuaaddrruuppllee--IIII++ BBLL44 SSRRAAMM 36Mb Quadruple-II+ BL4 SRAM Specification (2.0 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise.
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