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S7S3236U2M - 1Mx36 & 2Mx18 Quadruple-II+ BL2 SRAM

Datasheet Summary

Description

The S7S3236U2M and S7S3218U2M are 37,748,736-bits Quadruple Synchronous Pipelined Burst SRAMs.

They are organized as 1,048,576 words by 36bits for S7S3236U2M, 2,097,152 words by 18bits for S7S3218U2M.

Features

  • Key Parameters.
  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future fre- quency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
  • Separate independent read and write data ports with concurrent read and write operation Part Number Org. Freq. (MHz) S7S3236U2M-E(F)C(I)45 450 S7S3236U2M-E(F)C(I)40 x36 400 Cycle Access Time Time RoHS (ns) (ns) 2.2 0.45 Ο 2.5 0.45 Ο.
  • HS.

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Datasheet Details

Part number S7S3236U2M
Manufacturer NETSOL
File Size 416.86 KB
Description 1Mx36 & 2Mx18 Quadruple-II+ BL2 SRAM
Datasheet download datasheet S7S3236U2M Datasheet
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Full PDF Text Transcription

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SSSS7777SSSS3333222231316868UUUU2222MMMM 11MMxx3366&&22MMxx1188QQuuaaddrruuppllee--IIII++BBLL22SSRRAAMM 36Mb Quadruple-II+ BL2 SRAM Specification (2.5 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise.
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