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S7S4418U4M - 144Mb Quadruple-II+ BL4 SRAM

This page provides the datasheet information for the S7S4418U4M, a member of the S7S4436U4M 144Mb Quadruple-II+ BL4 SRAM family.

Datasheet Summary

Description

The S7S4436U4M and S7S4418U4M are 150,994,944-bits Quadruple Synchronous Pipelined Burst SRAMs.

They are organized as 4,194,304 words by 36bits for S7S4436U4M and 8,388,608 words by 18bits for S7S4418U4M.

Features

  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future fre- quency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
  • Separate independent read and write data ports with concurrent read and write operation.
  • HSTL I/O.
  • Full data coherency, providing most current data.
  • Synchronous pipeline read with self timed late write.
  • Read latency: 2.5 clock cycle.

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Datasheet preview – S7S4418U4M

Datasheet Details

Part number S7S4418U4M
Manufacturer NETSOL
File Size 415.54 KB
Description 144Mb Quadruple-II+ BL4 SRAM
Datasheet download datasheet S7S4418U4M Datasheet
Additional preview pages of the S7S4418U4M datasheet.

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Full PDF Text Transcription

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SS77SS44443366UU44MM SS77SS44441188UU44MM 44MMxx3366 && 88MMxx1188 QQuuaaddrruuppllee--IIII++ BBLL44 SSRRAAMM 144Mb Quadruple-II+ BL4 SRAM Specification (2.5 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise.
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