S7T1618U4M Datasheet | NETSOL

SS77TT11663366UU44MM SS77TT11661188UU44MM SS77TT11660099UU44MM 551122KKxx3366&&11MMxx1188&&22MMxx99QQuuaaddrruuppllee--III++BBLL44SSRRAAMMww//OODDTT 18Mb Quadruple-II+ BL4 w/ ODT SRAM Specification (2.5 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS pliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. For updates or additional information about Netsol products, please contact to netsol@netsol.co.kr Rev. 1.0 Jun. 2014 -1- S7T1636U4M S7T1618U4M S7T1609U4M 512Kx36 & 1Mx18 & 2Mx9 Quadruple-II+ BL4 SRAM w/ ODT Document Title 512Kx36 & 1Mx18 & 2Mx9 - Bit Quadruple-II+ Burst Length of 4 SRAM w/ ODT (2.5 Clock Read Latency) Revision History Rev. No. History Initial Draft Final spec release Draft Date Oct. 2012 Jun. 2014 Remark Preliminary Final Rev. 1.0 Jun. 2014 -2- S7T1636U4M S7T1618U4M S7T1609U4M 512Kx36 & 1Mx18 & 2Mx9 Quadruple-II+ BL4 SRAM w/ ODT 512Kx36 & 1Mx18 & 2Mx9 - Bit Quadruple-II+ Burst Length of 4 SRAM w/ ODT (2.5 Clock Read Latency) Features - 1.8V+0.1V/-0.1V Power Supply. - DLL circuitry for wide output data valid window and future fre- quency scaling. - I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O - Separate independent read and write data ports with concurrent read and write operation - HSTL I/O - Full data coherency, providing most current data...