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NTE7476 Integrated Circuit TTL − Dual J−K Flip−Flop with Preset and Clear
Description: The NTE7476 is a dual J−K flip−flop in a 16−Lead plastic DIP type package that contains two independent J−K positive−edge−triggered flip−flops with individual J−K clock, preset, and clear inputs. J−K input is loaded into the master while the clock is high and transferred to the slave on the high−to−low transition. J and K inputs must be stable while the clock is high.
Absolute Maximum Ratings: (Note 1) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7476 Datasheet
