74LVC1G79 Datasheet | NXP Semiconductors

description The 74LVC1G79 provides a single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q-output on the LOW-to-HIGH transition of the clock pulse. The D-input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features s Wide supply voltage range from 1.65 V to 5.5 V s High noise immunity s plies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ±24 m A output drive (VCC = 3.0 V) s CMOS low power consumption s Latch-up performance exceeds 250 m A s Direct interface with TTL levels s Inputs accept voltages up to 5 V s Multiple package options s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V s Specified from - 40 °C to +125 °C NXP Semiconductors 74LVC1G79 w w w . D a t a S h Single D-type flip-flop; positive-edge trigger 3. Ordering information Table 1. Ordering information Package Temperature range 74LVC1G79GW 74LVC1G79GV 74LVC1G79GM 74LVC1G79GF - 40 °C to +125 °C - 40 °C to +125 °C - 40 °C to +125 °C - 40 °C to +125 °C Name TSSOP5 SC-74A XSON6 XSON6 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm Version SOT353-1 SOT753 SOT886 SOT891 Type number 4. Marking Table 2. Marking codes Marking VP V79 VP VP Type number 74LVC1G79GW 74LVC1G79GV 74LVC1G79GM 74LVC1G79GF 5. Functional...