74LVC3GU04 Datasheet | NXP Semiconductors

Triple inverter Rev. 05 - 5 October 2007 Product data sheet 1. General description The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These Features allow the use of these devices in a mixed 3.3 V and 5 V environment. 2. Features I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity plies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V ±24 mA output drive...