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ADC1412D105 - Dual 14-bit ADC

This page provides the datasheet information for the ADC1412D105, a member of the ADC1412D065 Dual 14-bit ADC family.

Datasheet Summary

Description

The ADC1412D is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps.

Features

  • I I I I I I SNR, 73 dB SFDR, 90 dBc Sample rate up to 125 Msps Dual-channel14-bit pipelined ADC core Single 3 V supply Flexible input voltage range: 1 V to 2 V (p-p) with 6 dB programmable fine gain I CMOS or LVDS DDR digital outputs I INL ±1 LSB, DNL ±0.5 LSB (typical) I I I I I I Input bandwidth, 650 MHz Power dissipation, 775 mW at 80 Msps SPI Interface Duty cycle stabilizer Fast OTR detection Offset binary, 2’s complement, gray code I Power-down and Sleep modes I HVQFN64 package NXP Semicond.

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Datasheet Details

Part number ADC1412D105
Manufacturer NXP Semiconductors
File Size 337.27 KB
Description Dual 14-bit ADC
Datasheet download datasheet ADC1412D105 Datasheet
Additional preview pages of the ADC1412D105 datasheet.

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Full PDF Text Transcription

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ADC1412D065/080/105/125 Dual 14-bit ADC 65, 80, 105 or 125 Msps CMOS or LVDS DDR digital outputs Rev. 02 — 4 June 2009 www.DataSheet4U.com Objective data sheet 1. General description The ADC1412D is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage Differential Signalling) DDR (Double Data Rate) output standard.
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