BUK9610-55A Datasheet | NXP Semiconductors

D2 PA K N-channel Trench MOS logic level FET Rev. 02 - 16 February 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits - AEC Q101 pliant - Low conduction losses due to low on-state resistance - Suitable for logic level gate drive sources - Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications - 12 V and 24 V loads - Automotive and general purpose power switching - Motors, lamps and solenoids 1.4 Quick reference data Table 1. Symbol VDS ID Ptot Quick reference data Parameter drain-source voltage drain current total power dissipation drain-source on-state resistance Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tj = 25 °C; see Figure 1; see Figure 3 Tmb = 25 °C; see Figure 2 [1] Min - Typ - Max Unit 55 75 200 V A W Static characteristics RDSon VGS = 4.5 V; ID = 25 A; Tj = 25 °C VGS = 10 V; ID = 25 A; Tj = 25 °C VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 11 7 8 11 9 10 mΩ mΩ mΩ NXP Semiconductors N-channel Trench MOS logic level FET Quick reference data …continued Parameter Conditions Min Typ Max Unit 333 m J Table 1. Symbol EDS(AL)S Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 55 V; drain-source RGS = 50 Ω; VGS = 5 V; avalanche energy Tj(init) = 25 °C; unclamped gate-drain charge VGS = 5 V; ID = 25 A; VDS = 44 V; Tj = 25 °C; see Figure 13 Dynamic characteristics QGD 28 n...