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LPC1224 - 32-bit ARM Cortex-M0 microcontroller

Download the LPC1224 datasheet PDF. This datasheet also covers the LPC122x variant, as both devices belong to the same 32-bit arm cortex-m0 microcontroller family and are provided as variant models within a single manufacturer datasheet.

General Description

The LPC122x extend NXP's 32-bit ARM microcontroller continuum and target a wide range of industrial applications in the areas of factory and home automation.

Key Features

  • Processor core.
  • ARM Cortex-M0 processor, running at frequencies of up to 45 MHz (one wait state from flash) or 30 MHz (zero wait states from flash). The LPC122x have a high score of over 45 in CoreMark CPU performance benchmark testing, equivalent to 1.51/MHz.
  • ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
  • Serial Wire Debug (SWD).
  • System tick timer.
  • Memory.
  • Up to 8 kB SRAM.
  • Up to 128 kB on-chip flash programming memory.
  • In-.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (LPC122x_NXPSemiconductors.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LPC122x 32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash and 8 kB SRAM Rev. 2 — 26 August 2011 Product data sheet 1. General description The LPC122x extend NXP's 32-bit ARM microcontroller continuum and target a wide range of industrial applications in the areas of factory and home automation. Benefitting from the ARM Cortex-M0 Thumb instruction set, the LPC122x have up to 50 % higher code density compared to common 8/16-bit microcontroller performing typical tasks. The LPC122x also feature an optimized ROM-based divide library for Cortex-M0, which offers several times the arithmetic performance of software-based libraries, as well as highly deterministic cycle time combined with reduced flash code size.