LPC2124 Overview
The LPC2114/2124 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128/256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at maximum clock rate. For critical code size
LPC2124 Key Features
- Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device. They also allow for a port pin
- Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are 5 V tolerant when configured for digit
- UART0/1 include fractional baud rate generator, auto-bauding capabilities and handshake flow-control fully implemented i
- Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats
- SPI programmable data length and master mode enhancement
- Diversified Code Read Protection (CRP) enables different security levels to be
- General purpose timers can operate as external event counters
- 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package
- 16 kB on-chip static RAM
- 128/256 kB on-chip flash program memory. 128-bit wide interface/accelerator enables high speed 60 MHz operation
LPC2124 Applications
- Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device. They also allow for a port pin to be read at any time regardless of it
- Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are 5 V tolerant when configured for digital I/O function(s)
- UART0/1 include fractional baud rate generator, auto-bauding capabilities and handshake flow-control fully implemented in hardware