LPC2917 Overview
2.1 Architectural overview The LPC2917/19 consists of: An ARM968E-S processor with real-time emulation support An AMBA multi-layer Advanced High-performance Bus (AHB) for interfacing to the on-chip memory controllers Two DTL buses (a universal NXP interface) for interfacing to the interrupt controller and the Power, Clock and Reset Control cluster (also called subsystem) Three VLSI Peripheral Buses (VPB - a patible...
LPC2917 Applications
- An ARM968E-S processor with real-time emulation support
- An AMBA multi-layer Advanced High-performance Bus (AHB) for interfacing to the
- Two DTL buses (a universal NXP interface) for interfacing to the interrupt controller