Datasheet4U Logo Datasheet4U.com

P89LPC932A1 - 8-Bit Microcontroller

General Description

The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices.

Key Features

  • 2.1 Principal features s 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 256-byte RAM data memory, 512-byte auxiliary on-chip RAM. s 512-byte customer data EEPROM on chip allows serialization of devices, storage of set-up parameters, etc. s Two analog comparators with selectable inputs and reference source. s Two 16-bit counter/timers (each may be configured to toggle a port output.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
P89LPC932 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB Flash with 512-byte data EEPROM and 768-byte RAM NXP
P89LPC9321 8-bit microcontroller NXP
P89LPC930 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM NXP
P89LPC9301 8-bit Microcontroller NXP
P89LPC9301A1 8-bit Microcontroller NXP

Other Datasheets by NXP Semiconductors

Part Number Description
P89LPC9331 8-bit microcontroller
P89LPC9341 8-bit microcontroller
P89LPC9351 8-bit microcontroller
P89LPC9361 8-bit microcontroller
P89LPC904 8-bit microcontrollers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
P89LPC932A1 Rev. 02 — 10 May 2005 www.DataSheet4U.com 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM Product data sheet 1. General description The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC932A1 in order to reduce component count, board space, and system cost. 2. Features 2.1 Principal features s 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.