PTN3332 Datasheet | NXP Semiconductors

.. High speed differential line receiver Rev. 01 - 07 January 2004 Product data 1. Description The PTN3332 is a differential line receiver that implements the electrical characteristics of Low-Voltage Differential Signaling (LVDS). This device meets or exceeds the requirements of the ANSI TIA/EIA-644 Standard. LVDS is used to achieve higher data rates on monly used media. LVDS overes the limitations of achievable slew rates and EMI restrictions of previous differential signaling techniques. The PTN3332 operates at a 3.3 volt supply level. Any of the four differential receivers provides a valid logical output state with a ±100 m V differential input voltage within the input mon-mode voltage range. The input mon-mode voltage range allows 1 volt of ground potential difference between two LVDS nodes. The intended application of this device is for point-to-point baseband transmission rates over a controlled impedance media of approximately 100 Ω. The maximum rates and distance of data transfer are dependent upon the attenuation characteristics of the media selected and the noise coupling to the environment. The PTN3332 is designed to function over the full industrial temperature range of - 40 °C to +85 °C. 2. Features s s s s s s s s Meets or exceeds the requirements of ANSI TIA/EIA-644 Standard Designed for signaling rates of up to 400 Mbps Differential input thresholds of ±100 m V Power dissipation of 60 m W typical at 200 MHz Typical propagation delay of 2.6 ns Low Voltage TTL (LVTTL) logic output levels Pin patible with AM26LS32 and SN65LVDS32 Open-circuit fail safe. 3. Applications s Low voltage, low EMI, high speed differential signal receiver s Point-to-point high speed data transmission s High performance switches and routers. Philips Semiconductors .. High speed differential line receiver 4. Pinning information 4.1 Pinning 1B 1A 1Y G 2Y 2A 2B GND 1 2 3 16 VCC 15 4B 14 4A 1B 1A 1Y G 2Y 2A...