DESCRIPTION
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH). HEF4093B gates Fig.2 Pinning diagram. HEF4093BP(N): HEF4093BD(F): HEF4093BT(D): 14-lead DIL; plastic (SOT27-1) 14-lead DIL; ceramic (cerdip) (SOT73) 14-lead SO; plastic (SOT108-1) ( ): Package Designator North America Fig.3 Logic diagram (one gate). FAMILY DATA, IDD LIMITS category GATES See Family Specifications Fig.1 Functional diagram. January 1995 2 Philips Semiconductors Product specification Quadruple 2-input NAND Schmitt trigger DC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C VDD V Hysteresis voltage Switching levels positive-going input voltage negative-going input voltage 5 10 15 5 10 15 5 10 15 VN VP VH SYMBOL MIN. 0,4 0,6 0,7 1,9 3,6 4,7 1,5 3 4 TYP. 0,7 1,0 1,3 2,9 5,2 7,3 2,2 4,2 6,0 − − − 3,5 7 11 3,1 6,4 10,3 HEF4093B gates MAX. V V V V V V V V V Fig.5 Fig.4 Transfer characteristic.
NXP Semiconductors
