74ABT374A Datasheet | NXP Semiconductors

Features - 8-bit positive edge triggered register - 3-State output buffers - Output capability: +64m A/- 32m A - Latch-up protection exceeds 500m A per Jedec Std 17 - ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model DESCRIPTION The 74ABT374A high-performance Bi CMOS device bines low static and dynamic power dissipation with high speed and high output drive. The 74ABT374A is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation. When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. - Power-up 3-State - Power-up reset - Live insertion/extraction permitted QUICK REFERENCE DATA SYMBOL t PLH t PHL CIN COUT ICCZ PARAMETER Propagation delay CP to Qn Input capacitance Output capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50p F; VCC = 5V VI = 0V or VCC Outputs disabled; VO = 0V or VCC Outputs disabled; VCC =5.5V TYPICAL 3.4 3.8 4 7 110 UNIT ns p F p F µA ORDERING INFORMATION PACKAGES 20-Pin Plastic DIP 20-Pin plastic SO 20-Pin Plastic SSOP Type II 20-Pin Plastic TSSOP Type I TEMPERATURE RANGE - 40°C to +85°C - 40°C to +85°C - 40°C to +85°C - 40°C to +85°C OUTSIDE NORTH AMERICA 74ABT374A N 74ABT374A D 74ABT374A DB 74ABT374A PW NORTH AMERICA 74ABT374A N 74ABT374A D 74ABT374A DB 74ABT374APW DH DWG NUMBER SOT146-1 SOT163-1 SOT339-1 SOT360-1 PIN CONFIGURATION PIN...