NXP Semiconductors 74ABT841
The 74ABT841 Bus interface register is designed to provide extra data width for wider data/address paths of buses carrying parity. The 74ABT841 consists of ten D-type latches with 3-State outputs. The flip-flops appear transparent to the data when Latch Enable (LE) is High.FEATURES
● High speed parallel latches● Extra data width for wide address/data paths or buses carrying parity
● Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
● Slim DIP 300 mil package
● Broadside pinout
● Output capability: +64mA/–32mA
● Latch-up protection exceeds 500mA per Jedec Std 17
● ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
● Power-up 3-State
● Power-up reset
DESCRIPTION
This allows asynchronous operation, as the output transition follows the data in transition. On the LE High-to-Low transition, the