Datasheet Summary
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74AHC594; 74AHCT594
8-bit shift register with output register
Rev. 01
- 4 July 2006 Product data sheet
1. General description
The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin patible with Low-Power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 7A. The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers. A serial output (Q7S) is provided for cascading purposes. Both the shift and storage register clocks are...