74AHCT125 Description
The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard No. The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs.
74AHCT125 Key Features
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Inputs accepts voltages higher than VCC
- For AHC only: operates with CMOS input levels
- For AHCT only: operates with TTL input levels