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74AHCT373 - Octal D-type transparent latch

Description

The 74AHC/AHCT373 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

Features

  • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger actions.
  • Inputs accepts voltages higher than VCC.
  • Common 3-state output enable input.
  • Functionally identical to the ‘533’, ‘563’ and ‘573’.
  • For AHC only: operates with CMOS input levels.
  • For AHCT only: operates with TTL input levels.

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Datasheet Details

Part number 74AHCT373
Manufacturer NXP
File Size 97.47 KB
Description Octal D-type transparent latch
Datasheet download datasheet 74AHCT373 Datasheet
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INTEGRATED CIRCUITS DATA SHEET 74AHC373; 74AHCT373 Octal D-type transparent latch; 3-state Product specification Supersedes data of 1998 Dec 11 File under Integrated Circuits, IC06 1999 Nov 23 Philips Semiconductors Product specification Octal D-type transparent latch; 3-state FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt-trigger actions • Inputs accepts voltages higher than VCC • Common 3-state output enable input • Functionally identical to the ‘533’, ‘563’ and ‘573’ • For AHC only: operates with CMOS input levels • For AHCT only: operates with TTL input levels • Specified from −40 to +85 °C and −40 to +125 °C.
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