74AHCT573 Description
74AHCT573 The 74AHC/AHCT573 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard No. The 74AHC/AHCT573 are octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications.
74AHCT573 Key Features
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- mon 3-state output enable input
- Functionally identical to the ‘563’ and ‘373’
- Inputs accepts voltages higher than VCC
- For AHC only: operates with CMOS input levels
- For AHCT only: operates with TTL input levels
- Specified from -40 to +85 and +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. DESCRIPTION