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74AHCT86 - Quad 2-input EXCLUSIVE-OR gate

General Description

The 74AHC/AHCT86 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

Key Features

  • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
  • Inputs accepts voltages higher than VCC.
  • For AHC only: operates with CMOS input levels.
  • For AHCT only: operates with TTL input levels.
  • Specified from.
  • 40 to +85 °C and.
  • 40 to +125 °C.

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Other Datasheets by NXP Semiconductors

Part Number Description
74AHCT00 Quad 2-input NAND gate
74AHCT02 Quad 2-input NOR gate
74AHCT08 Quad 2-input AND gate
74AHCT123A Dual retriggerable monostable multivibrator
74AHCT125 Quad buffer/line driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET 74AHC86; 74AHCT86 Quad 2-input EXCLUSIVE-OR gate Product specification File under Integrated Circuits, IC06 1999 Sep 17 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Inputs accepts voltages higher than VCC • For AHC only: operates with CMOS input levels • For AHCT only: operates with TTL input levels • Specified from −40 to +85 °C and −40 to +125 °C. DESCRIPTION The 74AHC/AHCT86 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT86 provides the 2-input EXCLUSIVE-OR function.