74AHCU04
Key Features
- ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Inputs accepts voltages higher than VCC
- Specified from -40 to +85 and +125 °C. DESCRIPTION The 74AHCU04 is high-speed Si-gate CMOS devices and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74AHCU04 is a general purpose hex inverter. Each of the six inverters is a single stage. FUNCTION TABLE See note 1. INPUT nA L H Note 1. H = HIGH voltage level; L = LOW voltage level. OUTPUT nY H L Notes QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. SYMBOL tPHL/tPLH CI CO CPD PARAMETER propagation delay nA to nY input capacitance output capacitance power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITIONS CL = 15 pF; VCC = 5 V VI = VCC or GND 74AHCU04
