74ALS651-1 Description
The 74LAS651 and 74ALS652 transceivers/registers consist of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output enable (OEAB, OEBA) and select (SAB, SBA) pins are provided for...
74ALS651-1 Key Features
- Independent registers for A and B buses
- Multiplexed real-time and stored data
- Choice of non-inverting and inverting data paths
- 3-State outputs
- The -1 versions sinks 48mA IOL within the ±5% VCC range
- B7 CPAB CPBA SAB SBA OEAB OEBA A0
- A7, B0
- A7, B0