Datasheet4U Logo Datasheet4U.com

74ALVC373 - Octal D-type transparent latch

Description

The 74ALVC373 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Features

  • Wide supply voltage range from 1.65 to 3.6 V.
  • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).
  • 3.6 V tolerant inputs/outputs.
  • CMOS LOW power consumption.
  • Direct interface with TTL levels (2.7 to 3.6 V).
  • Power-down mode.
  • Latch-up performance exceeds ≤250 mA.
  • ESD protection: 2000 V Human Body Model (JESD22-A114-A) 200 V Machine Model (JESD22-A115-A).

📥 Download Datasheet

Datasheet preview – 74ALVC373

Datasheet Details

Part number 74ALVC373
Manufacturer NXP
File Size 97.97 KB
Description Octal D-type transparent latch
Datasheet download datasheet 74ALVC373 Datasheet
Additional preview pages of the 74ALVC373 datasheet.
Other Datasheets by NXP

Full PDF Text Transcription

Click to expand full text
INTEGRATED CIRCUITS DATA SHEET 74ALVC373 Octal D-type transparent latch; 3-state Product specification File under Integrated Circuits, IC24 2002 Feb 26 Philips Semiconductors Product specification Octal D-type transparent latch; 3-state FEATURES • Wide supply voltage range from 1.65 to 3.6 V • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V). • 3.6 V tolerant inputs/outputs • CMOS LOW power consumption • Direct interface with TTL levels (2.7 to 3.6 V) • Power-down mode • Latch-up performance exceeds ≤250 mA • ESD protection: 2000 V Human Body Model (JESD22-A114-A) 200 V Machine Model (JESD22-A115-A).
Published: |