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74ALVC374 - Octal D-type flip-flop positive edge-trigger

General Description

The 74ALVC374 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

The 74ALVC374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications.

Key Features

  • Wide supply voltage range from 1.65 to 3.6 V.
  • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).
  • 3.6 V tolerant inputs/outputs.
  • CMOS LOW power consumption.
  • Direct interface with TTL levels (2.7 to 3.6 V).
  • Power-down mode.
  • Latch-up performance exceeds ≤250 mA.
  • ESD protection: 2000 V Human Body Model (JESD22-A 114-A) 200 V Machine Model (JESD22-A 115-A).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET 74ALVC374 Octal D-type flip-flop; positive edge-trigger; 3-state Product specification File under Integrated Circuits, IC24 2002 Feb 26 Philips Semiconductors Product specification Octal D-type flip-flop; positive edge-trigger; 3-state FEATURES • Wide supply voltage range from 1.65 to 3.6 V • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V). • 3.6 V tolerant inputs/outputs • CMOS LOW power consumption • Direct interface with TTL levels (2.7 to 3.6 V) • Power-down mode • Latch-up performance exceeds ≤250 mA • ESD protection: 2000 V Human Body Model (JESD22-A 114-A) 200 V Machine Model (JESD22-A 115-A).