74ALVCH16601 Overview
The 74ALVCH16601 is an 18-bit universal transceiver featuring non-inverting 3-State bus patible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is High.
74ALVCH16601 Key Features
- plies with JEDEC standard no. 8-1A
- CMOS low power consumption
- Direct interface with TTL levels
- MULTIBYTETM flow-through standard pin-out architecture
- Low inductance multiple VCC and ground pins for minimum noise
- Current drive ± 24 mA at 3.0 V
- All inputs have bus hold circuitry
- Output drive capability 50Ω transmission lines @ 85°C
