74ALVCH16841 Overview
The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. When nOE is LOW, the data in the registers appears at the outputs.
74ALVCH16841 Key Features
- Wide supply voltage range of 1.2V to 3.6V
- plies with JEDEC standard no. 8-1A
- Wide supply voltage range of 1.2V to 3.6V
- CMOS low power consumption
- Direct interface with TTL levels
- MULTIBYTETM flow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins for minimum noise
