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74ALVT16841 - 2.5V/3.3V ALVT 20-bit bus interface latch

General Description

The 74ALVT16841 Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity.

It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V.

The 74ALVT16841 consists of two sets of ten D-type latches with 3-State outputs.

Key Features

  • High speed parallel latches.
  • 5V I/O Compatible.
  • Live insertion/extraction permitted.
  • Extra data width for wide address/data paths or buses carrying.
  • Power-up 3-State.
  • Power-up reset.
  • Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors parity.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74ALVT16841 2.5V/3.3V ALVT 20-bit bus interface latch (3-State) Product specification Supersedes data of 1996 Aug 28 IC23 Data Handbook 1998 Feb 13 Philips Semiconductors Philips Semiconductors Product specification 2.5V/3.3V 20-bit bus interface latch (3-State) 74ALVT16841 FEATURES • High speed parallel latches • 5V I/O Compatible • Live insertion/extraction permitted • Extra data width for wide address/data paths or buses carrying • Power-up 3-State • Power-up reset • Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors parity DESCRIPTION The 74ALVT16841 Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. It is designed for VCC operation at 2.5V or 3.