74F00 Datasheet PDF

DESCRIPTION

14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F00N N74F00D INDUSTRIAL RANGE VCC = 5V ±10%, Tamb = –40°C to +85°C I74F00N I74F00D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dna, Dnb Data inputs

DESCRIPTION

74F (U.L.) HIGH/LOW 1.0/1.0 LOAD VALUE HIGH/LOW 20µA/0.6mA 1.0mA/20mA Qn Data output 50/33 NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state. LOGIC DIAGRAM D0a D0b D1a D1b D2a D2b VCC = Pin 14 GND = Pin 7 D3a D3b 1 2 4 5 9 10 12 13 11 3 Q0 FUNCTION TABLE INPUTS Dna L L 8 Q2 OUTPUT Dnb L H L Qn H H H L 6 Q1 H Q3 SF00002 H H NOTES: H = High voltage level L = Low voltage level LOGIC SYMBOL IEC/IEEE SYMBOL 1 1 2 4 5 9 10 12 13 2 & 3 4 6 D0a D0bD1a D1b D2a D2b D3a D3b 5 9 Q0 Q1 Q2 Q3 8 10 12 3 VCC = Pin 14 GND = Pin 7 6 8 11 11 13 SF00003 SF00004 October 4, 1990 2 853-0325 00623 Philips Semiconductors Product specification Quad 2-input NAND gate 74F00

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device.