74F161A Description
4-bit binary.
74F161A Key Features
- Synchronous counting and loading
- Two count enable inputs for n-bit cascading
- Positive edge-triggered clock
- Asynchronous Master Reset (74F161A)
- Synchronous Reset (74F163A)
- High speed synchronous expansion
- Typical count rate of 130MHz
- Industrial range (-40°C to +85°C) available
- Q3) in 74F161A to Low levels, regardless of the levels at CP, PE, CET and CEP inputs (thus providing an asynchronous cle
- Q3) to Low levels after the next positive-going transition on the clock (CP) input (provided that the setup and hold tim