74HC14-Q100 Description
74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin patible with Low-power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 74HCT14-Q100 provides six inverting buffers with Schmitt-trigger action.
74HC14-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from 40 C to +85 C and from 40 C to +125 C
- Low-power dissipation
- ESD protection
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
- Multiple package options
74HC14-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C