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74HC4051-Q100 - 8-channel analog multiplexer/demultiplexer

General Description

The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

The device is specified in compliance with JEDEC standard no.

7A.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from 40 C to +85 C and from 40 C to +125 C.
  • Wide analog input voltage range from 5 V to +5 V.
  • Low ON resistance:.
  • 80  (typical) at VCC  VEE = 4.5 V.
  • 70  (typical) at VCC  VEE = 6.0 V.
  • 60  (typical) at VCC  VEE = 9.0 V.
  • Logic level translation: to enable 5 V logic to communicate with 5 V analog signals.
  • Typical ‘break before make’ built-in.
  • ESD protect.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74HC4051-Q100; 74HCT4051-Q100 8-channel analog multiplexer/demultiplexer Rev. 2 — 8 October 2012 Product data sheet 1. General description The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A. The 74HC4051-Q100; 74HCT4051-Q100 is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.