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74HCT157 - Quad 2-input multiplexer

Download the 74HCT157 datasheet PDF. This datasheet also covers the 74HC157 variant, as both devices belong to the same quad 2-input multiplexer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC157; 74HCT157 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL.

It is specified in compliance with JEDEC standard no.

7A.

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Note: The manufacturer provides a single datasheet file (74HC157-NXP.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74HC157; 74HCT157 Quad 2-input multiplexer Rev. 8 — 28 December 2015 Product data sheet 1. General description The 74HC157; 74HCT157 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74HC/HCT157. The state of the common data select input (S) determines the particular register from which the data comes.