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74HCT273-Q100 - Octal D-type flip-flop

Download the 74HCT273-Q100 datasheet PDF. This datasheet also covers the 74HC273-Q100 variant, as both devices belong to the same octal d-type flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from 40 C to +85 C and from 40 C to +125 C.
  • Input.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC273-Q100-NXP.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT273-Q100 Octal D-type flip-flop nexperia
74HCT273 Octal D-type flip-flop nexperia
74HCT273BQ Octal D-type flip-flop nexperia
74HCT273D Octal D-type flip-flop nexperia
74HCT273DB Octal D-type flip-flop nexperia

Other Datasheets by NXP Semiconductors

Part Number Description
74HCT273 Octal D-type flip-flop
74HCT27 Triple 3-input NOR gate
74HCT244 Octal buffer/line driver
74HCT245 Octal bus transceiver
74HCT245-Q100 Octal bus tranceiver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC273-Q100; 74HCT273-Q100 Octal D-type flip-flop with reset; positive-edge trigger Rev. 1 — 19 June 2013 Product data sheet 1. General description The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes which enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.