74HCT4040 - 12-stage binary ripple counter

This page provides the datasheet information for the 74HCT4040, a member of the 74HC4040 12-stage binary ripple counter family.

Product Overview

NXP

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74HCT4040 12-stage binary ripple counter by NXP - Datasheet Preview — Datasheet preview – 74HCT4040

Datasheet Details

Part number	74HCT4040
Manufacturer	NXP
File Size	156.24 KB
Description	12-stage binary ripple counter
Datasheet	74HCT4040 Datasheet
Additional preview pages of the 74HCT4040 datasheet.

74HCT4040 Product details

Description

The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11).

The counter advances on the HIGH-to-LOW transition of CP.

Features

Complies with JEDEC standard no. 7A.
Input levels:.
For 74HC4040: CMOS level.
For 74HCT4040: TTL level.
ESD protection:.
HBM JESD22-A114F exceeds 2000 V.
MM JESD22-A115-A exceeds 200 V.
Multiple package options.
Specified from 40 C to +85 C and from 40 C to +125 C 3.

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Published: Feb 20, 2015 |