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74HCT423 - Dual retriggerable monostable multivibrator

This page provides the datasheet information for the 74HCT423, a member of the 74HC423 Dual retriggerable monostable multivibrator family.

Datasheet Summary

Description

74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with Low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

Features

  • DC triggered from active HIGH or active LOW inputs.
  • Retriggerable for very long pulses up to 100 % duty factor.
  • Direct reset terminates output pulse.
  • Schmitt-trigger action on all inputs except for the reset input.
  • Complies with JEDEC standard no. 7A.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • Specified from 40 C to +85 C and from 40 C to +125 C NXP Semiconductors 74HC423; 74HCT423 Dual retriggerable mon.

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Datasheet preview – 74HCT423

Datasheet Details

Part number 74HCT423
Manufacturer NXP
File Size 211.80 KB
Description Dual retriggerable monostable multivibrator
Datasheet download datasheet 74HCT423 Datasheet
Additional preview pages of the 74HCT423 datasheet.

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Full PDF Text Transcription

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74HC423; 74HCT423 Dual retriggerable monostable multivibrator with reset Rev. 6 — 19 December 2011 Product data sheet 1. General description 74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two methods of output pulse width control. 1. The minimum pulse width is essentially determined by the selection of an external resistor (REXT) and capacitor (CEXT), see Section 12.1. 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB).
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