NXP Semiconductors 74HCT4515
The 74HC/HCT4515 are high-speed Si-gate CMOS devices and are pin compatible with “4515” of the “4000B” series. They are specified in compliance with JEDEC standard no. The 16 inverting outputs (Q0 to Q15) are mutually exclusive active LOW.| Part No. | 74HCT4515 |
|---|---|
| Datasheet | 74HCT4515 Download |
| Manufacturer |  NXP Semiconductors |
| Description | 4-to-16 line decoder/demultiplexer |
| Buy | Stock & Price |
FEATURES
● Inverting outputs● Output capability: standard
● ICC category: MSI
GENERAL DESCRIPTION
7A. 74HC/HCT4515 The 74HC/HCT4515 are 4-to-16 line decoders/demultiplexers having four binary weighted address inputs (A0 to A3) with latches, a latch enable input (LE), and an active LOW enable input (E). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is LOW. When E is HIGH, all outputs are HIGH. The enable input (E) does not affect the state of the latch. When the “4515” is used as a demultiplexer, E is the data input and A0 to A3 are the address inputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2.
