74LV138 Datasheet | NXP Semiconductors

3-to-8 line decoder/demultiplexer; inverting Rev. 4 - 4 March 2016 Product data sheet 1. General description The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function patible with 74HC138 and 74HCT138. The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW outputs (Y0 to Y7). There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines)...