74LVC1G58 Datasheet PDF (Low-power configurable multiple function gate)

74LVC1G58 - Low-power configurable multiple function gate

Description

The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

Features

s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V). ±24 mA output drive (VCC = 3.0 V) ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up.

Datasheet Details

Part number	74LVC1G58
Manufacturer	NXP
File Size	100.62 KB
Description	Low-power configurable multiple function gate
Datasheet	74LVC1G58 Datasheet
Additional preview pages of the 74LVC1G58 datasheet.

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Full PDF Text Transcription

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74LVC1G58 Low-power conﬁgurable multiple function gate Rev. 01 — 15 September 2004 Product data sheet 1. General description The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully speciﬁed for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down. The 74LVC1G58 provides conﬁgurable multiple functions. The output state is determined by eight patterns of 3-bit input.

Published: Mar 22, 2005 |