NXP Semiconductors 74LVC2G02
The 74LVC2G02 is a dual 2-input NOR gate. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using IOFF.FEATURES AND BENEFITS
● Wide supply voltage range from 1.65 V to 5.5 V● 5 V tolerant outputs for interfacing with 5 V logic
● Overvoltage tolerant inputs to 5.5 V
● High noise immunity
● ±24 mA output drive (VCC = 3.0 V)
● CMOS low power consumption
● IOFF circuitry provides partial Power-down mode operation
● Latch-up performance exceeds 250 mA
● Direct interface with TTL levels
● Complies with JEDEC standard:
● JESD8-7 (1.65 V to 1.95 V)
● JESD8-5 (2.3 V to 2.7 V)
● JESD8-B/JESD36 (2.7 V to 3.6 V)
● ESD protection:
● HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
● CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
● Multiple package options
● Specified from -40 °C to +85 °C and -40 °C to +125 °C Nexperia 74LVC2G02 Dual 2-input NOR gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74LVC2G02DP -40 °C to +125 °C Name TSSOP8 74LVC2G02DC -40 °C to +125 °C VSSOP8 74LVC2G02GT -40 °C to +125 °C XSON8 74LVC2G02GF -40 °C to +125 °C XSON8 74...