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74LVC2G08-Q100 - Dual 2-input AND gate

General Description

The 74LVC2G08-Q100 provides a 2-input AND gate function.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of the 74LVC2G08-Q100 as a translator in a mixed 3.3 V and 5 V environment.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from 40 C to +85 C and from 40 C to +125 C.
  • Wide supply voltage range from 1.65 V to 5.5 V.
  • 5 V tolerant outputs for interfacing with 5 V logic.
  • High noise immunity.
  • 24 mA output drive (VCC = 3.0 V).
  • CMOS low power consumption.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD8-B/JESD36 (2.7 V to 3.6 V).
  • Latc.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LVC2G08-Q100 Dual 2-input AND gate Rev. 1 — 26 June 2013 Product data sheet 1. General description The 74LVC2G08-Q100 provides a 2-input AND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G08-Q100 as a translator in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.