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74LVC3G17 Datasheet PDF

NXP Semiconductors 74LVC3G17

The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using Ioff.
Part No. 74LVC3G17
Datasheet 74LVC3G17 Download
Manufacturer
NXP Semiconductors
Description Triple non-inverting Schmitt trigger
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74LVC3G17 datasheet page 1 preview

FEATURES

s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C. s s s s s s 3.

APPLICATIONS

s Wave and pulse shapers for highly noisy environments. Philips Semiconductors 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input 4. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C. Symbol tPHL, tPLH Parameter propagation delay input nA to output nY Conditions VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ VCC = 2.5 V; CL = 30 pF; RL = 500 Ω VCC = 2.7 V; CL = 50 pF; RL = 500 Ω VCC = 3.3 V; CL = 50 pF; RL = 500 Ω VCC = 5.0 V; CL = 50 pF; RL = 500 Ω CI CPD [1] Min [1] [2] Typ 5.6 3.7 3.8 3.6...
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