NXP Semiconductors 74LVC543A
The 74LVC543A is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC543A is an octal registered transceiver containing two sets of D–type latches for temporary storage of the data flow in either direction. The 74LVC543A contains eight D–type latches, with separate inputs and controls for each set.FEATURES
● 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic● Supply voltage range of 1.2V to 3.6V
● Complies with JEDEC standard no. 8–1A
● CMOS low power consumption
● Direct interface with TTL levels
● 8-bit octal transceiver with D-type latch
● Back-to-back registers for storage
● Separate controls for data flow in each direction
● 3-State non-inverting outputs for bus oriented applications
● High impedance when VCC = 0V
DESCRIPTION
Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of the data flow. For data flow from A to B, for example, the A–to–B enable (EAB) input must be LOW in order to enter data from A0–A7 or take data from B0–B7, as indicated in the function table. With EAB LOW, a LOW signal on the A–to–B latch enable (LEAB) input makes the A–to–B latches transparent; a subsequent LOW–to HIGH transition of the LEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs.