NXP Semiconductors 74LVC827A
The 74LVC827A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC827A is a10-bit buffer/line driver with 3-State outputs The 3-State outputs are controlled by the output enable inputs OE1 and OE2.| Part No. | 74LVC827A |
|---|---|
| Datasheet | 74LVC827A Download |
| Manufacturer |  NXP Semiconductors |
| Description | 10-bit buffer/line driver |
| Buy | Stock & Price |
FEATURES
● 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic● Supply voltage range of 2.7V to 3.6V
● Complies with JEDEC standard no. 8-1A
● CMOS low power consumption
● Direct interface with TTL levels
● High impedance when VCC = 0V
DESCRIPTION
Inputs can be driven from either 3.3V or 5.0V devices. In 3-state operation, outputs can handle 5V. A HIGH on OEn causes the outputs to assume a high impedance OFF-state. QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay An to Yn Input capacitance Power dissipation capacitance per buffer Notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V TYPICAL 4 5.0 24 UNIT ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL × VCC2 × fo) = sum of the outputs. 2. The condition is...
