NXP Semiconductors 74LVC841A
The 74LVC841A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environment. The 74LVC841A is a 10-bit transparent latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications.FEATURES
● 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic● Wide supply voltage range of 1.2 V to 3.6 V
● In accordance with the JEDEC standard no. 8-1 A
● Inputs accept voltages up to 5.5 V
● CMOS low power consumption
● Direct interface with TTL levels
● Flow-through pin-out architecture
DESCRIPTION
Inputs can be driven from either 3.3 V or 5 V devices. In 3-State operation, outputs can handle 5 V. A latch enable (LE) input and an output enable (OE) input are common to all internal latches. The 74LVC841A consists of ten transparent latches with 3-State true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the ten latches are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state.