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74LVT20 - 3.3V Dual 4-input NAND gate

General Description

PIN NUMBER 1, 2, 4, 5, 9, 10, 12, 13 6, 8 7 14 SYMBOL An, Bn, Cn, Dn Yn GND VCC NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage Dna L X 2 4 5 9 10 12 13 13 SF00068 FUNCTION TABLE INPUTS Dnb X L X X Dnc X X L X H Dnd X X X L H OUTPUT Qn H H H H L LOGIC SYMBOL 1 X X

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INTEGRATED CIRCUITS 74LVT20 3.3V Dual 4-input NAND gate Product specification IC24 Data Handbook 1996 Aug 28 Philips Semiconductors Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An, Bn, Cn, Dn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3.3V TYPICAL UNIT LOGIC DIAGRAM A0 B0 C0 1 2 6 4 5 Y0 tPLH tPHL 3.4 3.2 ns D0 CIN ICCL VI = 0V or 3.0V Outputs Low; VCC = 3.6V 3 0.